Freescale Semiconductor /MK70F12 /SIM /SCGC1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCGC1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)OSC1 0 (0)UART4 0 (0)UART5

OSC1=0, UART5=0, UART4=0

Description

System Clock Gating Control Register 1

Fields

OSC1

OSC1 clock gate control

0 (0): Clock is disabled.

1 (1): Clock is enabled.

UART4

UART4 clock gate control

0 (0): Clock is disabled.

1 (1): Clock is enabled.

UART5

UART5 clock gate control

0 (0): Clock is disabled.

1 (1): Clock is enabled.

Links

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